High-Performance, Stand-Alone ADCs for a Variety of Embedded Systems Applications
8 ADC Converter Function Pack Design Guide
ADC Converter Function Pack Design Guide 9
High-Performance, Stand-Alone ADCs for a Variety of Embedded Systems Applications
A dual-slope converter operates by charging a capacitor from
the input voltage during a fixed time, and then discharging it to
zero. Actual data conversion is accomplished in two phases:
input signal integration and reference voltage de-integration.
The integrator output is initialized to 0V prior to the start of
integration. During integration, analog switch S
1
connects V
IN
to the integrator input, where it is maintained for a fixed time
period (t
INT
).
The application of V
IN
causes the integrator output to depart
0V at a rate determined by the magnitude of V
IN
, and a
direction determined by the polarity of V
IN
. The de-integration
phase is initiated immediately at the expiration of t
INT
.
ADC BY ARCHITECTURE – DUAL-SLOPE /INTEGRATING
During de-integration, S
1
connects a reference voltage (having
a polarity opposite that of V
IN
) to the integrator input. At the
same time, an external precision timer is started. The
de-integration phase is maintained until the comparator output
changes states, indicating the integrator has returned to its
starting point of 0V. When this occurs, the precision timer is
stopped. The de-integration time period (t
DEINT
), as measured
by the precision timer, is directly proportional to the magnitude
of the applied input voltage.
A simple mathematical equation relates the input signal,
reference voltage and integration time:
(1/R
INT
C
INT
)*integral [ V
IN
(t) dt ] from t = 0 to t = t
INT
For a constant V
IN
:
V
IN
= V
REF
* (t
DEINT
/ t
INT
)
The dual-slope converter accuracy is unrelated to the
integrating resistor and capacitor values as long as they are
stable during a measurement cycle.
An inherent benefit is noise immunity. Input noise spikes are
integrated (averaged to zero) during the integration periods.
Integrating ADCs are immune to the large conversion errors
that plague successive approximation converters in high-noise
environments.
Integrating converters provide inherent noise rejection, with at
least a 20 dB/decade attenuation rate. Interference signals
with frequencies at integral multiples of the integration period
are, theoretically, completely removed since the average value
of a sine wave of frequency (1/t) averaged over a period (t) is
zero.
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